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Automatic Extraction Methodology for Accurate Measurements of Effective Channel Length on 65nm MOSFET Technology and Below

by admin on May 20th, 2010

D. Fleury, A. Cros, K. Romanjek, D. Roy, F. Perrier, B. Dumont, H. Brut and G. Ghibaudo
IEEE Transactions on Semiconductor Manufacturing, vol.21, no. 4, Nov. 2008

ABSTRACT
The length of MOSFET channels is an important circuit design parameter, and this paper focuses on a new industrially-compatible technique using gate-to-channel measurements Cgc(Vg) to provide accurate extraction of the channel length. Thanks to fully-automatic probers, the technique provides large scale extractions and so, statistical-based results can be extracted with a maximized reliability. An in-depth study of parasitic capacitances has been performed to improve the extraction accuracy to within a few nanometers.

[Full paper] (full-text article)

This paper appears in: Semiconductor Manufacturing, IEEE Transactions on
Issue Date :  Nov. 2008
Issue Date : Nov. 2008
Volume : 21, Issue:4

On page(s): 504 – 512
Location: Tokyo, Japan
ISSN : 0894-6507
INSPEC Accession Number: 10311692
Digital Object Identifier : 10.1109/TSM.2008.2004316

Date of Current Version : 05 novembre 2008
Sponsored by : IEEE Components, Packaging and Manufacturing Technology Society

Copyright © 2008 IEEE. This material is posted here with permission of the IEEE. Internal or personal use of this material is permitted. However, permission to preprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org

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